Synopsys SpyGlass vP-2019.06 SP1.1

半导体设计软件的全球领导者 Synopsys, Inc. 推出了 Synopsys SpyGlass vP-2019.06 SP1.1。该平台使用许多先进的算法和分析技术，在 RTL 流程的早期为设计人员提供有关其设计的洞察力。它的功能类似于面向设计工程师和管理人员的交互式指导系统，为复杂的 SoC 找到最快、成本最低的实现途径。

SpyGlass P-2019.06-SP1-1 中的主要增强功能

SpyGlass 核心 进行了以下增强：
– .awl 文件中的 Pragma 注释：增强 SpyGlass 以支持 .awl 文件中的 pragma 注释。请注意，在 .awl 文件中，只能用 # 字符指定 pragma 注释，这与 .swl 文件中可以用 # 和 // 字符指定的 pragma 注释不同。此支持仅适用于 .awl 文件中的块豁免编译指示。不支持内联豁免编译指示。
– 更简单的报告：通过添加两个名为 ReportObsoleteRules 和 ReportDeprecatedRules 的规则来增强 SpyGlass，以报告默认情况下在 moresimple.rptreport 中运行的 SpyGlass 中指定的过时和弃用规则。以前，只有在 SpyGlass 运行中包含过时或弃用的规则时，SpyGlass 才会在屏幕上生成警告消息。

SpyGlass CDC
已进行以下增强：
– Ac_coherency06a：通过添加名为 Ac_coherency06a 的规则增强 SpyGlass CDC，以报告在相同顺序深度内在相同时钟域中多次同步的信号。此外，还引入了一个名为 coherency_seq_depth 的参数，该参数控制 Ac_coherency06a 规则检测到的公共源超出的序列元素的数量。

Synopsys 的 SpyGlass RTL 签核解决方案是一种设计和编码指南检查器，可提供完整的芯片混合语言（Verilog、VHDL 和 SystemVerilog）和混合表示（RTL 和门）功能，以加快复杂片上系统 (SoC) 设计的开发. SpyGlass 的 GuideWare 方法大大增强了设计人员检查 HDL 代码的可综合性、可模拟性、可重用性、时钟域交叉、低功耗、时序约束、可测试性和 RTL/门签收的能力。SpyGlass 还集成了行业标准的最佳实践，以及 Synopsys 自己与行业领先客户合作的丰富经验。

下面介绍了如何在您的设计上快速运行 SpyGlass Lint 检查。
Synopsys, Inc. 是半导体设计电子设计自动化 (EDA) 软件的全球领导者。该公司为全球电子市场提供技术领先的半导体设计和验证平台以及 IC 制造软件产​​品，支持复杂片上系统 (SoC) 的开发和生产。Synopsys 还提供知识产权和设计服务，以简化设计流程并加快客户的上市时间。Synopsys 总部位于加利福尼亚州山景城，在北美、欧洲、日本和亚洲的 60 多个地点设有办事处。

Synopsys, Inc., the world leader in semiconductor design software, has unveiled Synopsys SpyGlass vP-2019.06 SP1.1. Using many advanced algorithms and analysis techniques, this platform provides designers with insight about their design, early in the process at RTL. It functions like an interactive guidance system for design engineers and managers, finding the fastest and least expensive path to implementation for complex SoCs.

Key Enhancements in SpyGlass P-2019.06-SP1-1

SpyGlass Core
The following enhancements have been made:
– Pragma Comments in .awl Files: Enhanced SpyGlass to support pragma comments in .awl files. Note that in .awl files, pragma comments can be specified with the # character only unlike in .swl files where pragma comments can be specified with both # and // characters. This support is available only for block waiver pragmas in .awl files. Inline waiver pragmas are not supported.
– moresimple report: Enhanced SpyGlass by adding two rules, named ReportObsoleteRules and ReportDeprecatedRules, to report obsolete and deprecated rules specified in a SpyGlass run in the moresimple.rptreport by default. Previously, SpyGlass generated a Warning message on the screen only if an obsolete or deprecated rule is included in a SpyGlass run.

SpyGlass CDC
The following enhancement has been made:
– Ac_coherency06a: Enhanced SpyGlass CDC by adding a rule, named Ac_coherency06a, to report signals that are synchronized multiple times in the same clock domain within same sequential depth. In addition, a parameter, named coherency_seq_depth, is introduced that controls the number of sequential elements beyond which the common source is detected by the Ac_coherency06a rule.

Synopsys’ SpyGlass RTL signoff solution is a design and coding guideline checker that delivers full chip mixed-language (Verilog, VHDL and SystemVerilog) and mixed representation (RTL & gate) capabilities to speed development of complex system-on-chip (SoC) designs. SpyGlass’ GuideWare methodology, greatly enhances the designer’s ability to check HDL code for synthesizability, simulatability, reusability, clock domain crossings, low power, timing constraints, testability and RTL/gate signoff. SpyGlass also integrates industry-standard best practices, as well as Synopsys’ own extensive experience working with industry-leading customers.

Here’s how you can quickly run SpyGlass Lint checks on your design.
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia.

Product: Synopsys SpyGlass
Version: vP-2019.06 SP1.1 with Documentation
Supported Architectures: x86_x64
Website Home Page : http://www.synopsys.com
Languages Supported: english
System Requirements: Linux *
Size: 8.2 Gb

* System Requirements: