FPGA Design with MATLAB & Simulink

本课程将让您了解“如何在 MATLAB/Simulink 上设计基于 FPGA 的信号处理项目”。

本课程是关于使用 MATLAB/Simulink 和 FPGA 设计工具 (Xilinx VIVADO/ISE) 设计基于 FPGA 的信号处理项目，我们将使用 Xilinx System Generator（MATLAB/Simulink 和 VIVADO/ISE 之间的接口）和 HDL Coder。通过这两个工具，我们可以在传统的 MATLAB/Sumilink 设计流程上设计我们的项目；在 Simulink 中使用 Blocks 和集成块或使用 MATLAB 代码，最后将这两种类型的设计转换为 HDL 或 Bitstream，以便我们可以从 MATLAB/Simulink 或 VIVADO/ISE 对 FPGA 进行编程。

我们有关于 FPGA 上的 FIR、IIR、LMS 滤波器设计和 OFDM 调制算法实现的会议。

MATLAB 和 Simulink 是信号处理项目的最佳工具，而 FPGA 是此类信号处理项目的最佳硬件平台，因为它具有灵活性和处理能力。

MP4 | Video: h264, 1280×720 | Audio: AAC, 44.1 KHz
Language: English | Size: 768 MB | Duration: 2h 52m

What you’ll learn
FPGA Development with Matlab and Simulink Tool.
Creating Projects with System Generator and HDL coder
Implementing FIR and IIR Filter on FPGA from System Generator
Implementation of OFDM modulation on FPGA
Zynq FPGA Design with Matlab/Simulink (System Generator)
LMS filter design with HDL coder from Matlab
Requirements
Basic Idea of Matlab and Simulink
FPGA Design Basics
Idea of FPGA Design with Xilinx ISE and VIVADO
Idea of Hardware Description Language
Description
This Course will let you know about “How to Design FPGA based Signal Processing Projects on MATLAB/Simulink”.

This course is on Designing FPGA based Signal Processing Projects with MATLAB/Simulink and FPGA Design Tool (Xilinx VIVADO/ISE), we are going to use Xilinx System Generator (interface between MATLAB/Simulink and VIVADO/ISE) and HDL Coder. From this two tools we can design our projects on traditional MATLAB/Sumilink design flow; using Blocks and integrating blocks in Simulink or using MATLAB codes and finally converting this two types of design in to HDL or into Bitstream so we can program FPGA from MATLAB/Simulink or VIVADO/ISE.

We have session on FIR,IIR, LMS Filter Design and OFDM Modulation algorithm implementation on FPGA.

MATLAB & Simulink are the best tools for Signal Processing Projects, while FPGA are best hardware platform for such type of Signal Processing Projects cause of it’s flexibility and processing capabilities.

Who this course is for:
Engineering Enthusiast
Computer Science
FPGA Design Enthusiast