自适应和智能计算领域的领导者 Xilinx, Inc. 很高兴地宣布推出 Vitis（读作 Vī-tis）核心开发套件 2019.2，这是一个统一的软件平台，可为包括软件工程师和 AI 在内的广泛的新开发人员提供支持科学家——利用硬件适应性的力量。
Vitis 核心开发套件 2019.2 – 日期：2019 年 11 月 12 日
Xilinx 于 2019.2 推出首个 Vitis 统一软件平台版本
– Xilinx SDK、SDSoC 和 SDAccel 开发环境统一为一个用于嵌入式软件和应用加速开发的
一体化软件平台- Xilinx 嵌入式处理器平台和数据中心加速卡的统一设计方法
– Vitis 核心开发套件 2019.2 安装包括 Vitis编译器 (V++)、ARM 和 x86 主机的主机编译器、Vitis Analyzer
– Vitis 加速库、Xilinx 运行时库 (XRT) 和 Vitis 目标平台可单独下载
新的 Vivado 设计套件为设计团队提供了利用基于 C 的设计和优化重用、IP 子系统重用、集成自动化和加速设计收敛所需的工具和方法。与 UltraFast 高层次生产力设计方法指南结合使用时，这种独特的组合已被证明可以通过使设计人员在高抽象层次上工作，同时促进设计重用来提高生产力。
Vivado 设计套件通过下一代 C/C++ 和基于 IP 的设计为超高生产力提供了一种新方法。结合新的 UltraFast 高级生产力设计方法指南，用户可以实现比传统方法 10-15 倍的生产力提升。
从 Vivado 2019.1 开始，Dynamic Function eXchange 包含在所有 Vivado 版本中，包括 WebPack。
Xilinx, Inc., the leader in adaptive and intelligent computing, is pleased to announce the availability of Vitis (pronounced Vī-tis) Core Development Kit 2019.2, a unified software platform that enables a broad new range of developers – including software engineers and AI scientists – to take advantage of the power of hardware adaptability.
Vitis Core Development Kit 2019.2 – Date: Nov 12, 2019
Xilinx introduces the first release of the Vitis Unified Software Platform in 2019.2
– Unification of Xilinx SDK, SDSoC and SDAccel Development Environment into an all-in-one software platform for embedded software and application acceleration development
– Unified design methodology for Xilinx Embedded Processor Platforms and Data Center Accelerator Cards
– Vitis Core Development Kit 2019.2 Installation includes Vitis Compilers (V++), Host Compilers for ARM and x86 hosts, Vitis Analyzer
– Vitis Accelerated Libraries, Xilinx Runtime library(XRT) and Vitis Target Platforms Available as separate downloads
The new Vivado Design Suite supply design teams with the tools and methodology needed to leverage C-based design and optimized reuse, IP sub-system reuse, integration automation and accelerated design closure. When coupled with the UltraFast High-Level Productivity Design Methodology Guide, this unique combination is proven to accelerate productivity by enabling designers to work at a high level of abstraction while facilitating design reuse.
The Vivado Design Suite offers a new approach for ultra-high productivity with next generation C/C++ and IP-based design. When coupled with the new UltraFast High-Level Productivity Design Methodology Guide, users can realize a 10-15X productivity gain over traditional approaches.
Starting with Vivado 2019.1, Dynamic Function eXchange is included at within all Vivado Editions, including WebPack.
In this training you will learn, in-depth: HDL coding recommendations targeting hardware, constraint creation and validation best practices, utilization of the planning and analysis tool for physical constraints such as clock and pin planning, as well as, floorplanning for maximum performance. If you are new to Vivado or FPGA design we encourage you to review this video.
Product: Xilinx Vitis Core Development Kit
Version: 2019.2_1106_2127 *
Supported Architectures: x64
Website Home Page : http://www.xilinx.com
Language: english
System Requirements: PC / Linux **
Supported Operating Systems: **
Size: 32.5 Gb
– To install, select Vitis on the Xilinx Unified Installer. Vitis installation includes Vivado Design Suite – There is no need to install Vivado separately.
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